1. Field of the Invention
The present invention is related to a semiconductor memory device, and, in particular, a NOR flash memory device.
This application claims the benefit of Korean Patent Application No. 2004-105622, filed Dec. 14, 2004, the disclosure of which is hereby incorporated by reference in its entirety.
2. Description of Related Art
Semiconductor memory devices are a vital microelectronic component commonly found in digital logic systems, such as computers, and microprocessor-based applications ranging from satellites to consumer electronics. Therefore, advances in the fabrication of semiconductor memory devices, including process enhancements and circuit-design-related developments that allow scaling to higher memory densities and faster operating speeds, help establish performance standards for other digital logic families. Semiconductor memory devices generally include volatile memory devices, such as random access memory (RAM) devices, and nonvolatile memory devices. In RAM devices, data is stored by either establishing the logic state of a bistable flip-flop such as in a static random access memory (SRAM), or by charging a capacitor in a dynamic random access memory (DRAM). In both SRAM and DRAM devices, data remains stored and may be read as long as the power is applied, but data is lost when the power is turned off.
In contrast, nonvolatile memories are capable of storing data even when the power is turned off. Nonvolatile memory data storage modes include permanent and reprogrammable modes. Nonvolatile memories are commonly used for program and microcode storage in a wide variety of applications including computers, avionics, telecommunications, and consumer electronics. A combination of volatile and nonvolatile memory devices and related storage modes are available in devices such as nonvolatile SRAM (nvRAM) devices. These devices are used, for example, in systems that require fast, reprogrammable nonvolatile memory.
Mask read-only memory (MROM), programmable read-only memory (PROM) and erasable programmable read-only memory (EPROM) nonvolatile memory devices are not readily writeable or erasable, so it is not easy to update the contents of the memory. On the other hand, electrically erasable programmable read-only memory (EEPROM) nonvolatile memory devices are electrically erasable and writable, and may, thus, be readily applied to auxiliary memories or system programming memories that require continuous update.
Flash memory, which is a type of EEPROM, is one example of a nonvolatile memory device. While standard EEPROM can only erase or write one byte of data in a single programming operation, flash memory can erase or write multiple bytes, or “blocks”, of data in a single programming operation.
Flash memory devices store data on a silicon chip in such a way that even if the power to the chip is turned off, the data is retained on the chip. The two general types of flash memory are NOR flash memory and NAND flash memory. NOR flash memory uses a NOR logic gate in each cell while NAND flash memory uses a NAND logic gate in each cell. In flash memory devices, each cell can typically store one bit of data, though there are also multi-bit flash memory devices in which each cell can store two or more bits of data. In flash memory devices, cells are arranged in rows and columns to form an array of cells.
The following is an exemplary configuration of a flash memory cell. In a flash memory cell, a bit line and a word line are connected to the cell, which comprises a control gate, a floating gate, a substrate with a source and a drain, and two oxide layers. The cell is arranged so that the word line is connected to the control gate, and the bit line is connected to the substrate, with the floating gate between the control gate and the substrate. Between the control gate and the floating gate is the first oxide layer, and between the floating gate and the substrate is the second oxide layer.
The data state of the cell is determined by the threshold voltage of the cell. A cell having a low threshold voltage corresponds to the data state “1”, or “erased”, for the data bit held in the cell, and a high threshold voltage corresponds to the data state “0”, or “programmed”, for the data bit held in the cell. The cell is brought from the erased state to the programmed state using a process called Fowler-Nordheim tunneling. To program the cell using Fowler-Nordheim tunneling, the word line supplies the control gate with a high voltage, while the bit line supplies the substrate with a low voltage, creating a voltage difference between the control gate and the substrate strong enough to pull electrons out of the substrate towards the floating gate. The electrons are then trapped between the control gate and the first oxide layer creating a barrier between the control gate and the floating gate and raising the threshold voltage of the cell to a value associated with the programmed state. Cells can typically be programmed by the byte or by the word.
To erase the cell, the bit line supplies a high voltage to the substrate and the word line supplies a low voltage to the control gate causing a voltage difference between the control gate and the substrate that causes the trapped electrons to be pulled back across the first oxide layer and into the substrate, removing the barrier that the electrons formed and reducing the threshold voltage of the cell to a value associated with the erased state. Cells cannot be erased individually, but rather the cells are erased by the block.
To read the state of the cell, a voltage is applied to the control gate and the cell will either provide a relatively high voltage to the bit line, which the flash memory device reads as the cell having a programmed state, or a relatively low voltage, which the flash memory device reads as the cell having an erased state.
NOR flash memory devices perform programming operations within program loops, each of which consists of a program interval and a program verify interval. In each program loop, the device programs memory cells during the program interval and checks whether or not memory cells are programmed during the program verify interval. A time period (hereinafter, referred to as “programming time”) of sufficient duration to execute each program interval is provided during each program loop. Programming time is defined as the time required to program memory cells as described above when each bit in the set of input data bits has a logical value “0”. The voltage level applied to a bit line is a critical consideration in the determination of programming time. This consideration arises from the fact that the applied bit line voltage is generally lower than a defined threshold voltage during this period of programming operations. Hence, the programming time of each program loop is set to the maximum programming time required to program the memory cells, under the condition that each bit in the set of input data bits has a logical value “0”. Hereinafter, a data bit having a logical value “0” is called a “program data bit” and a data bit having a logical value “1” is called a “program-inhibit data bit”.
Conventionally, a programming time has been determined by the above condition and used for all inputs, even when some of the input bits in the input are program-inhibit data bits rather than program data bits. Maintaining a constant programming time regardless of the number of program data bits actually apparent in the input data slows the performance of the NOR flash memory device.
Accordingly, a technique capable of improving the programming performance of the NOR flash memory device is required.